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  a627308 series preliminary 128k x 8 bit cmos sram preliminary (february, 2001, version 0.2) amic technology, inc. document title 128k x 8 bit cmos sram revision history rev. no. history issue date remark 0.0 initial issue august 15, 2000 preliminary 0.1 omit 100ns grade items october 25, 2000 change i cc1 from 70ma to 45ma change i sb1 from 25 m a to 15 m a 0 .2 change i sb1 from 15 m a to 25 m a february 6, 2001
a627308 series preliminary 128k x 8 bit cmos sram preliminary (february, 2001, version 0.2) 1 amic technology, inc. nc a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o 0 i/o 1 i/o 2 i/o 3 gnd i/o 4 i/o 5 i/o 6 i/o 7 a10 a9 a8 a13 ce2 a15 vcc a11 a627308m 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 oe ce1 we a10 7 6 5 4 3 gnd oe ce1 2 1 0 a16 a627308v (a627308x) 1 9 32 24 a11 a9 2 3 4 5 6 7 8 10 11 12 13 14 15 16 a8 a13 vcc nc a14 a12 a7 a6 a5 a4 31 30 29 28 27 26 25 23 22 21 20 19 18 17 i/o i/o i/o i/o i/o a0 a1 a2 a3 a15 we ce2 i/o i/o i/o ~ ~ ~ ~ a16 features n power supply range: 4.5v to 5.5v n access times: 70 ns (max.) n current: operating: 45ma (max.) standby: 25 m a (max.) n full static operation, no clock or refreshing required n all inputs and outputs are directly ttl compatible n common i/o using three - state output n output enable and two chip enable inputs for easy application n data retention voltage: 2v (mi n.) n available in 32 - pin sop, tsop, stsop (8x 13.4mm) forward type packages general description the a627308 is a low operating current 1048,576 - bit static random access memory organized as 131,072 words by 8 bits and operates on a power supply voltage f rom 4.5v to 5.5v. inputs and three - state outputs are ttl compatible and allow for direct interfacing with common system bus structures. two chip enable inputs are provided for power down and a write enable and an output enable input are included for easy i nterfacing. data retention is guaranteed at a power supply voltage as low as 2v. pin configurations n n sop n n tsop/(stsop) (forward type)
a627308 series p reliminary (february, 2001, version 0.2) 2 amic technology, inc. block diagram row decoder 512 x 2048 memory array input data circuit column i/o control circuit ce2 ce1 we i/o 7 i/o 0 a16 a15 a14 a0 vcc gnd oe pin descriptions - sop pin no. symbol description 2 - 12, 23, 25 - 28, 31 a0 - a16 address inputs 13 - 15, 17 - 21 i/o 0 - i/o 7 data inputs/outputs 22 ce1 chip enable 1 30 ce2 chip enable 2 24 oe output enable 29 we write enable 32 vcc po wer supply 16 gnd ground 1 nc no connection pin description - tsop/stsop pin no. symbol description 1 - 4, 7, 10 - 20, 31 a0 - a16 address inputs 21 - 23, 25 - 29 i/o 0 - i/o 7 data inputs/outputs 30 ce1 chip enable 1 6 ce2 ch ip enable 2 32 oe output enable 5 we write enable 8 vcc power supply 24 gnd ground 9 nc no connection
a627308 series p reliminary (february, 2001, version 0.2) 3 amic technology, inc. recommended dc operating conditions (t a = 0 c to + 70 c) symbol parameter min. typ. max. unit vcc suppl y voltage 4.5 5.0 5.5 v gnd ground 0 0 0 v v ih input high voltage 2.2 - vcc + 0.5 v v il input low voltage - 0.5 - +0.8 v c l output load - - 30 pf ttl output load - - 1 - absolute maximum ratings* vcc to gnd . . . . . . . . . . . . . . . . . . . . . - 0.5v to + 7.0v in, in/out volt to gnd . . . . . . . . . - 0.5v to vcc + 0.5v operating temperature, topr . . . . . . . . - 25 c to + 85 c storage temperature, tstg . .. . . . . . . . - 55 c to + 125 c power dissipation, p t . . . . . . . . . . . . . . . . . . . . . . 0.7w soldering temp. & time . . . . . . . . . . . . . 260 c, 10 sec *comments stresses above those listed under "absolute maximum ratings" may cause permanent damage to this device. these are stress ratings only. functional operation of t his device at these or any other conditions above those indicated in the operational sections of this specification is not implied or intended. exposure to the absolute maximum rating conditions for extended periods may affect device reliability. dc elect rical characteristics (t a = 0 c to + 70 c, vcc = 5.0v 10%, gnd = 0v) symbol parameter a627308 - 70s unit conditions min. max. ? i li input leakage current - 1 m a v in = gnd to vcc ? i lo output leakage current - 1 m a ce1 = v ih o r ce2 = v il or oe = v ih or we = v il v i/o = gnd to vcc i cc active power supply current - 7 ma ce1 = v il , ce2 = v ih i i/o = 0ma i cc1 dynamic operating current - 45 ma min. cycle, duty = 100% ce1 = v il , ce2 = v ih i i/o = 0ma i cc2 dynamic operating current - 7 ma ce1 = v il , ce2 = v ih v ih = vcc , v il = 0v f = 1mhz, i i/o = 0ma
a627308 series p reliminary (february, 2001, version 0.2) 4 amic technology, inc. dc electrical characteristics (continued) symbol parameter a627308 - 70s unit conditions min. max. i sb - 0.5 ma ce1 = v ih or ce2 = v il i sb1 standby power supply current - 25 m a ce2 0.2v, or ce1 3 vcc - 0.2v v ol output low voltage - 0.4 v i ol = 2.1ma v oh output high voltage 2.4 - v i oh = - 1.0ma truth table mode ce1 ce2 oe we i/o operation supply current standby h x x x high z i sb , i sb1 x l x x high z i sb , i sb1 output disable l h h h high z i cc, i cc1, i cc2 rea d l h l h d out i cc, i cc1, i cc2 write l h x l d in i cc, i cc1, i cc2 note: x = h or l capacitance (t a = 25 c, f = 1.0mhz) symbol parameter min. max. unit conditions c in * input capacitance - 6 pf v in = 0v c i/o * input/output capacitance - 8 pf v i/o = 0v * these parameters are sampled and not 100% tested.
a627308 series p reliminary (february, 2001, version 0.2) 5 amic technology, inc. ac characteristics (t a = 0 c to + 70 , vcc = 5.0v 10%) symbol parameter a627308 - 70s unit min. max. read cycle t rc read cycle time 70 - ns t aa address access time - 70 ns t ace1 chip enable acce ss time ce1 - 70 ns t ace2 ce2 - 70 ns t oe output enable to output valid - 35 ns t clz1 chip enable to output in low z ce1 10 - ns t clz2 ce2 10 - ns t olz output enable to output in low z 5 - ns t chz1 chip disab le to output in high z ce1 0 25 ns t chz2 ce2 0 25 ns t ohz output disable to output in high z 0 25 ns t oh output hold from address change 10 - ns write cycle t wc write cycle time 70 - ns t cw chip enable to end of write 60 - ns t as address setup time 0 - ns t aw address valid to end of write 60 - ns t wp write pulse width 50 - ns t wr write recovery time 0 - ns t whz write to output in high z 0 30 ns t dw data to write time overlap 30 - ns t dh data hold from write time 0 - ns t ow output active from end of write 5 - ns notes: t chz1 , t chz2 , t ohz and t whz are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levels.
a627308 series p reliminary (february, 2001, version 0.2) 6 amic technology, inc. timing waveforms read cycle 1 (1) t rc address ce2 d out t aa t oe t olz 5 t ace1 t clz1 5 t ace2 t clz2 5 t chz2 5 t ohz 5 t chz1 5 t oh oe ce1 read cycle 2 (1, 2, 4) t rc t oh t aa t oh address d out
a627308 series p reliminary (february, 2001, version 0.2) 7 amic technology, inc. timing waveforms (continued) read cycle 3 (1, 3, 4, 6) t clz1 5 t ace1 t chz1 5 ce1 d out read cycle 4 (1, 4, 7, 8) t clz2 5 t ace2 t chz2 5 ce2 d out notes: 1. we is high for read cycle. 2. device is continuously enabled ce1 = v il and ce2 = v ih . 3. address valid prior to or coincident with ce1 transition low. 4. oe = v il . 5. transition is measured 50 0mv from steady state. this parameter is sampled and not 100% tested. 6. ce2 is high. 7. ce1 is low. 8. address valid prior to or coincident with ce2 transition high.
a627308 series p reliminary (february, 2001, version 0.2) 8 amic technology, inc. timing waveforms (continued) write cycle 1 (6) (write enable co ntrolled) t wc address ce1 ce2 d in t ow t dh t dw t whz t wp 2 t as 1 (4) t cw 5 t aw t wr 3 we d out (4)
a627308 series p reliminary (february, 2001, version 0.2) 9 amic technology, inc. timing waveforms (continued) write cycle 2 (6) (chip enable controlled) t wc address ce1 ce2 d in t dh t dw (4) (4) t cw 5 t aw t wr 3 we d out t whz 7 t wp 2 t cw 5 t as 1 notes: 1. t as is measured from the address valid to the beginning of write. 2. a write occurs during the over lap (t wp ) of a low ce1 , a high ce2 and a low we . 3. t wr is measured from the earliest of ce1 or we going high or ce2 going low to the end of the write cycle. 4. if the ce1 low transition or the ce2 high transition occurs simultaneously with the we low transition or after the we transition, outputs remain in a high impedance state. 5. t cw is measured from th e later of ce1 going low or ce2 going high to the end of write. 6. oe is continuously low. ( oe = v il ) 7. transition is measured 500mv from steady state. this parameter is sampled and not 100 % tested.
a627308 series p reliminary (february, 2001, version 0.2) 10 amic technology, inc. ac test conditions input pulse levels 0v to 3v input rise and fall time 5 ns input and output timing reference levels 1.5v output load see figures 1 and 2 30pf * including scope and jig. * including scope and jig. c l ttl 5pf c l ttl figure 1. output load figure 2. output load for t clz1 , t clz2 , t ohz , t olz , t chz1 , t chz2 , t whz , and t ow data retention characteristics (t a = 0 c to + 70 c) symbol parameter min. max. unit conditions v dr vcc for data retention 2.0 5.5 v ce2 0.2v, or ce1 3 vcc - 0.2v i ccdr data retention current - 10* m a vcc = 2.0v, ce2 0.2v, or ce1 3 vcc - 0.2v t cdr chip disable to data retention time 0 - ns t r operation recovery time t rc - ns t vr vcc rise time from data retention vol tage to operating voltage 5 - ms see retention waveform * a627308 - 70s i ccdr : max. 3 m a at t a = 0 c to + 40 c
a627308 series p reliminary (february, 2001, version 0.2) 11 amic technology, inc. low vcc data retention waveform (1) ( ce1 controlled) vcc ce1 t cdr v ih 4.5v t r v ih 4.5v data retention mode v dr 3 2v ce1 3 v dr - 0.2v t vr low vcc data retention waveform (2) (ce2 controlled) vcc ce2 t cdr v il 4.5v t r v il 4.5v data retention mode v dr 3 2v ce2 0.2v t vr
a627308 series p reliminary (february, 2001, version 0.2) 12 amic technology, inc. ordering information part no. access time (ns) operating current max. (ma) standby current max. ( m m a) package a627308m - 70s 32l sop a627308v - 70s 32l tsop a627308x - 70s 70 45 25 32l stsop
a627308 series p reliminary (february, 2001, version 0.2) 13 amic technology, inc. package information sop (w.b.) 32l ou tline dimensions unit: inches/mm 1 e h e l l e c 16 see detail f detail f 17 32 a 1 a 2 a s d seating plane d y e b q dimensions in inches dimensions in mm symbol min nom max min nom max a - - 0.118 - - 3.00 a 1 0.004 - - 0.10 - - a 2 0.101 0.106 0.111 2.57 2.69 2.82 b 0.014 0.016 0.020 0.36 0.41 0.51 c 0. 006 0.008 0.012 0.15 0.20 0.31 d - 0.805 0.817 - 20.45 20.75 e 0.440 0.445 0.450 11.18 11.30 11.43 e 0.044 0.050 0.056 1.12 1.27 1.42 h e 0.546 0.556 0.566 13.87 14.12 14.38 l 0.023 0.031 0.039 0.58 0.79 0.99 l e 0.047 0.055 0.063 1.19 1.40 1.60 s - - 0.036 - - 0.91 y - - 0.004 - - 0.10 q 0 - 10 0 - 10 notes: 1. the maximum value of dimension d includes end flash. 2. dimension e does not include resin fins. 3. dimension s includes end flash.
a627308 series p reliminary (february, 2001, version 0.2) 14 amic technology, inc. package information tsop 32l type i (8 x 20mm) ou tline dimensions unit: inches/mm e l e l a a 2 c d y detail "a" s a 1 b h d d e q detail "a" dimensions in inches dimensions in mm symbol min nom max min nom max a - - 0.047 - - 1.20 a 1 0.002 - 0.006 0.05 - 0.15 a 2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.009 0.011 0.18 0.22 0 .27 c 0.004 - 0.008 0.11 - 0.20 d 0.720 0.724 0.728 18.30 18.40 18.50 e - 0.315 0.319 - 8.00 8.10 e 0.020 bsc 0.50 bsc h d 0.779 0.787 0.795 19.80 20.00 20.20 l 0.016 0.020 0.024 0.40 0.50 0.60 l e - 0.032 - - 0.80 - s - - 0.020 - - 0.50 y - - 0.00 3 - - 0.08 q 0 - 5 0 - 5 notes: 1. the maximum value of dimension d includes end flash. 2. dimension e does not include resin fins. 3. dimension s includes end flash.
a627308 series p reliminary (february, 2001, version 0.2) 15 amic technology, inc. package information stsop 32l type i (8 x 13.4mm) outline dimensions unit: inches/mm e detail "a" d 0.076mm detail "a" s b d 1 e d l e l a a 2 c q a 1 seating plane dimensions in inches dimensions in mm symbol min nom max min nom max a - - 0.049 - - 1.25 a 1 0.002 - - 0.05 - - a 2 0.037 0.039 0.041 0.95 1.00 1.05 b 0.007 0.008 0.009 0.17 0.20 0.23 c 0.0056 0.0059 0.0062 0.142 0.150 0.158 e 0.311 0.315 0.319 7.90 8.00 8.10 e 0.020 typ 0.50 typ d 0.520 0.528 0.535 13.20 13.40 13.60 d 1 0.461 0.465 0.469 11.70 11.80 11.90 l 0.012 0.020 0.028 0.30 0.50 0.70 l e 0.0275 0.0315 0.0355 0.700 0.800 0.900 s 0.0109 typ 0.278 typ q 0 3 5 0 3 5 notes: 1. the maximum value of dimension d 1 includes end flash. 2. dimension e does not include resin fins. 3. dimension s includes end flash.


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